---------------------------------------------------------------------------------- -- bit adder ---------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity bit_adder is Port ( a, b, cin: in STD_LOGIC; cout, sum: out STD_LOGIC); end bit_adder; architecture Behavioral of bit_adder is begin sum <= a xor b xor cin; cout <= (a and b) or (a and cin) or (b and cin); end Behavioral;