Lecture 22/23: Computer-Aided Design; Design for Verification, Test and Security - PDF (no textbook reading)
Homeworks (due at start of class - no late submissions will be accepted)
Homework 1 (due Feb 5, 2019): problems 1.1, 1.6, 2.5a, 2.4 (you can download the homework problems and the solution here)
Homework 2 (due Feb 14, 2019): problems 2.9, 2.10, 2.7, 2.24b, 2.18 (you can download the homework problems and the solution here)
Homework 3 (due Feb 26, 2019): problems 2.9, 2.14, 2.38a, 2.51 (you can download the homework problems and the solution here)
Homework 4 (due Mar 26, 2019): problems 1.15a, 1.18, 2.20a, 2.38a, 2.39b, 2.43 (you can download the homework problems and the solution here)
Homework 5 (due Apr 4, 2019): problems 5.1, 5.13, 5.17, 5.21(b,c) (you can download the homework problems and the solution here)
Homework 6 (due Apr 30, 2019): you can download the homework problems and the solution here
Lab Assignments (due at start of class - no late submissions will be accepted)
NOTE: (1) Utilize the TA help hours - Monday 4:00-6:00pm in ITE 138, Thursday 4:30-6:30pm in ITE 134, and Friday 4-5:00pm in ITE 138, (2) Take a look at the VHDL Toolchain Guide PDF
Lab 0 (due Jan 29, 2019): Complete all steps for the toolchain setup and run the lab0 with test0 testbench. Submit your simulation output on a single page. Don't forget to write your name on your submission! Lab0 Guide PDF, lab0.vhd, test0.vhd