---------------------------------------------------------------------------------- -- 4-bit adder (behavioral) ---------------------------------------------------------------------------------- library IEEE; use IEEE.NUMERIC_BIT.ALL; --use IEEE.STD_LOGIC_1164.ALL; --use IEEE.STD_LOGIC_ARITH.ALL; --use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity adder4 is Port ( a, b : in unsigned (3 downto 0); cin : in bit; s : out unsigned (3 downto 0); co : out bit); end adder4; architecture Behavioral of adder4 is signal sum5 : unsigned (4 downto 0); begin sum5 <= '0'&a + b + unsigned'(0=>cin); -- behavioral adder s <= sum5(3 downto 0); co <= sum5(4); end Behavioral;