---------------------------------------------------------------------------------- -- ---------------------------------------------------------------------------------- library IEEE; use IEEE.NUMERIC_BIT.ALL; -- Uncomment the following library declaration if using -- arithmetic functions with Signed or Unsigned values --use IEEE.NUMERIC_STD.ALL; -- Uncomment the following library declaration if instantiating -- any Xilinx leaf cells in this code. --library UNISIM; --use UNISIM.VComponents.all; entity cir6_1test is -- Port ( ); end cir6_1test; architecture Behavioral of cir6_1test is COMPONENT sim_example port ( a, b : inout bit); END COMPONENT; signal a, b : bit; begin U1: sim_example port map (a, b); process begin wait for 30ns; wait; end process; end Behavioral;