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-- 
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library IEEE;
use IEEE.NUMERIC_BIT.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity cir6_3test is
--  Port ( );
end cir6_3test;

architecture Behavioral of cir6_3test is

    COMPONENT signal_multiple_updates_example
      port ( clk : in bit;
             a, b, c : inout bit);
    END COMPONENT;
    
signal clk, a, b, c : bit;

begin

U1: signal_multiple_updates_example port map (clk, a, b, c);

clk <= not clk after 5ns;

end Behavioral;