A private level-1 cache architecture to exploit the latency and capacity tradeoffs in multicores operating at near-threshold voltages

Farrukh Hijaz, Qingchuan Shi, Omer Khan
January 2013
PDF DOI
Type
Conference paper
Publication
2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, USA, October 6-9, 2013